View 74AVCH16T245DGV_8420950.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1. general description the 74avch16t245 is a 16-bit transceiver with bidirectional level voltage translation and 3-state outputs.the device can be used as two 8-bit transceivers or as a 16-bit transceiver. it has dual supplies (v cc(a) and v cc(b) ) for voltage translation and four 8-bit input-output ports (nan, nbn) each with its own output enable (noe ) and send/receive (ndir) input for direction control. v cc(a) and v cc(b) can be independently supplied at any voltage between 0.8 v and 3.6 v making the device suitable for low voltage translation between any of the following voltages: 0.8 v, 1.2 v, 1.5 v, 1.8 v, 2.5 v and 3.3 v. a high on ndir selects transmission from nan to nbn while a low on ndir selects transmission from nbn to nan. a high on noe causes the outputs to assume a high-impedance off-state the device is fully specified for pa rtial power-down applications using i off . the i off circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. in suspend mode when either v cc(a) or v cc(b) are at gnd level, both a and b outputs are in the high-impedance off-state. the bus-hold circuitry on the powered-up side always stays active. the 74avch16t245 has active bus hold circui try which is provided to hold unused or floating data inputs at a valid logic level. this feature eliminates the need for external pull-up or pull- down resistors. 2. features and benefits ? wide supply voltage range: ? v cc(a) : 0.8 v to 3.6 v ? v cc(b) : 0.8 v to 3.6 v ? complies with jedec standards: ? jesd8-12 (0.8 v to 1.3 v) ? jesd8-11 (0.9 v to 1.65 v) ? jesd8-7 (1.2 v to 1.95 v) ? jesd8-5 (1.8 v to 2.7 v) ? jesd8-b (2.7 v to 3.6 v) ? esd protection: ? hbm jesd22-a114f class 3b exceeds 8000 v ? mm jesd22-a115-a exceeds 200 v ? cdm jesd22-c101d exceeds 1000 v ? maximum data rates: ? 380 mbit/s ( ? 1.8 v to 3.3 v translation) 74avch16t245 16-bit dual supply translating transceiver wi th configurable voltage translation; 3-state rev. 5 ? 1 march 2012 product data sheet
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 2 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state ? 200 mbit/s ( ? 1.1 v to 3.3 v translation) ? 200 mbit/s ( ? 1.1 v to 2.5 v translation) ? 200 mbit/s ( ? 1.1 v to 1.8 v translation) ? 150 mbit/s ( ? 1.1 v to 1.5 v translation) ? 100 mbit/s ( ? 1.1 v to 1.2 v translation) ? suspend mode ? bus hold on data inputs ? latch-up performance exceeds 100 ma per jesd 78 class ii ? inputs accept voltages up to 3.6 v ? i off circuitry provides partial power-down mode operation ? multiple package options ? specified from ? 40 ? cto+85 ? c and ? 40 ? cto+125 ? c 3. ordering information [1] also known as tvsop48. 4. functional diagram table 1. ordering information type number package temperature range name description version 74avch16t245dgg ? 40 ? cto+125 ? c tssop48 plastic thin shrink small outline package; 48 leads; body width 6.1 mm sot362-1 74AVCH16T245DGV ? 40 ? cto+125 ? ctssop48 [1] plastic thin shrink small outline package; 48 leads; body width 4.4 mm; lead pitch 0.4 mm sot480-1 74avch16t245ev ? 40 ? cto+125 ? c vfbga56 plastic very thin fine-pitch ball grid array package; 56 balls; body 4.5 ? 7 ? 0.65 mm sot702-1 74avch16t245bx ? 40 ? cto+125 ? c hxqfn60 plastic compatible thermal enhanced extremely thin quad flat package; no leads; 60 terminals; body 4 ? 6 ? 0.5 mm sot1134-2 fig 1. logic diagram 001aak426 to other seven channels to other seven channels 1b1 1a1 1dir 1oe v cc(b) v cc(a) 2b1 2a1 2dir 2oe v cc(b) v cc(a)
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 3 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state fig 2. logic symbol 001aak425 1b1 1a1 1b2 1a2 1b3 1a3 1b4 1a4 1b5 1a5 1b6 1a6 1b7 1a7 1b8 1a8 1dir 1oe v cc(b) v cc(a) 2b1 2a1 2b2 2a2 2b3 2a3 2b4 2a4 2b5 2a5 2b6 2a6 2b7 2a7 2b8 2a8 2dir 2oe v cc(b) v cc(a)
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 4 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state 5. pinning information 5.1 pinning fig 3. pin configuration sot362-1 and sot480-1 (tssop48) fig 4. pin configuration sot702-1 (vfbga56) 74avch16t245 1dir 1oe 1b1 1a1 1b2 1a2 gnd gnd 1b3 1a3 1b4 1a4 v cc(b) v cc(a) 1b5 1a5 1b6 1a6 gnd gnd 1b7 1a7 1b8 1a8 2b1 2a1 2b2 2a2 gnd gnd 2b3 2a3 2b4 2a4 v cc(b) v cc(a) 2b5 2a5 2b6 2a6 gnd gnd 2b7 2a7 2b8 2a8 2dir 2oe 001aak430 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 001aak431 74avch16t245 transparent top view k j h g f e c b a d 246 135 ball a1 index area
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 5 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state (1) this is not a supply pin. the substrat e is attached to this pad us ing conductive die attach mate rial. there is no electrical or mechanical requirement to solder this pad. however, if it is soldered, the solder land should remain floating or be connected t o gnd. fig 5. pin configuration sot1134-2 (hxqfn60) d1 d3 a16 a15 a14 a13 a12 a11 d2 b9 b10 d7 a17 a18 b11 a19 b12 a20 b13 a21 b14 b8 a10 d6 a9 a8 b7 b6 a7 b5 a6 a22 b15 a23 b16 a24 b17 a25 a26 d8 d4 a27 b18 a28 a29 b19 b20 a30 a31 a32 b4 a5 b3 b2 b1 d5 a4 a3 a2 a1 74avch16t245 001aak432 transparent top view terminal 1 index area gnd (1)
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 6 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state 5.2 pin description [1] all gnd pins must be connected to ground (0 v). 6. functional description [1] h = high voltage level; l = low voltage level; x = don?t care; z = high-impedance off-state. [2] the nan, ndir and noe input circuit is referenced to v cc(a) ; the nbn input circuit is referenced to v cc(b) . [3] if at least one of v cc(a) or v cc(b) is at gnd level, the device goes into suspend mode. table 2. pin description symbol pin description sot362-1 and sot480-1 sot702-1 sot1134-2 1dir, 2dir 1, 24 a1, k1 a30, a13 direction control 1b1 to 1b8 2, 3, 5, 6, 8, 9, 11, 12 b2, b1, c2, c1, d2, d1, e2, e1 b20, a31, d5, d1, a2, b2, b3, a5 data input or output 2b1 to 2b8 13, 14, 16, 17, 19, 20, 22, 23 f1, f2, g1, g2, h1, h2, j1, j2 a6, b5, b6, a9, d2, d6, a12, b8 data input or output gnd [1] 4, 10, 15, 21, 28, 34, 39, 45 b3, d3, g3, j3, j4, g4, d4, b4 a32, a3, a8, a11, a16, a19, a24, a27 ground (0 v) v cc(b) 7, 18 c3, h3 a1, a10 supply voltage b (nbn inputs are referenced to v cc(b) ) 1oe , 2oe 48, 25 a6, k6 a29, a14 output enable input (active low) 1a1 to 1a8 47, 46, 44, 43, 41, 40, 38, 37 b5, b6, c5, c6, d5, d6, e5, e6 b18, a28, d8, d4, a25, b16, b15, a22 data input or output 2a1 to 2a8 36, 35, 33, 32, 30, 29, 27, 26 f6, f5, g6, g5, h6, h5, j6, j5 a21, b13, b12, a18, d3, d7, a15, b10 data input or output v cc(a) 31, 42 c4, h4 a17, a26 supply voltage a (nan, noe and ndir inputs are referenced to v cc(a) ) n.c. - a2, a3, a4, a5, k2, k3, k4, k5 a4, a7, a20, a23, b1, b4, b7, b9, b11, b14, b17, b19 not connected table 3. function table [1] supply voltage input input/output [3] v cc(a) , v cc(b) noe [2] ndir [2] nan [2] nbn [2] 0.8 v to 3.6 v l l nan = nbn input 0.8 v to 3.6 v l h input nbn = nan 0.8 v to 3.6 v h x z z gnd [3] xxzz
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 7 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state 7. limiting values [1] the minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are obs erved. [2] v cco is the supply voltage associated with the output port. [3] v cco + 0.5 v should not exceed 4.6 v. [4] above 60 ? c the value of p tot derates linearly with 5.5 mw/k. [5] above 70 ? c the value of p tot derates linearly with 1.8 mw/k. 8. recommended operating conditions [1] v cco is the supply voltage associated with the output port. [2] v cci is the supply voltage associated with the input port. table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc(a) supply voltage a ? 0.5 +4.6 v v cc(b) supply voltage b ? 0.5 +4.6 v i ik input clamping current v i <0v ? 50 - ma v i input voltage [1] ? 0.5 +4.6 v i ok output clamping current v o <0v ? 50 - ma v o output voltage active mode [1] [2] [3] ? 0.5 v cco +0.5 v suspend or 3-state mode [1] ? 0.5 +4.6 v i o output current v o =0vtov cc [2] - ? 50 ma i cc supply current i cc(a) or i cc(b) -1 0 0m a i gnd ground current ? 100 - ma t stg storage temperature ? 65 +150 ?c p tot total power dissipation t amb = ? 40 ? c to +125 ?c; tssop48 package [4] -5 0 0m w vfbga56 package [5] - 1000 mw hxqfn60 package [5] - 1000 mw table 5. recommended operating conditions symbol parameter conditions min max unit v cc(a) supply voltage a 0.8 3.6 v v cc(b) supply voltage b 0.8 3.6 v v i input voltage 0 3.6 v v o output voltage active mode [1] 0v cco v suspend or 3-state mode 0 3.6 v t amb ambient temperature ? 40 +125 ?c ? t/? v input transition rise and fall rate v cci = 0.8 v to 3.6 v [2] -5n s / v
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 8 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state 9. static characteristics [1] v cco is the supply voltage associated with the output port. [2] v cci is the supply voltage associated with the data input port. [3] the bus hold circuit can sink at least the minimum low sustaining current at v il max. i bhl should be measured after lowering v i to gnd and then raising it to v il max. [4] the bus hold circuit can source at leas t the minimum high sustaining current at v ih min. i bhh should be measured after raising v i to v cc and then lowering it to v ih min. [5] an external driver must source at least i bhlo to switch this node from low to high. [6] an external driver must sink at least i bhho to switch this node from high to low. [7] for i/o ports, the parameter i oz includes the input leakage current. table 6. typical static characteristics at t amb = 25 ?c [1] [2] at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit v oh high-level output voltage v i = v ih or v il i o = ? 1.5 ma; v cc(a) =v cc(b) = 0.8 v - 0.69 - v v ol low-level output voltage v i = v ih or v il i o = 1.5 ma; v cc(a) =v cc(b) = 0.8 v - 0.07 - v i i input leakage current ndir, noe input; v i = 0 v or 3.6 v; v cc(a) =v cc(b) = 0.8 v to 3.6 v - ? 0.025 ? 0.25 ? a i bhl bus hold low current a or b port; v i =0.42v;v cc(a) =v cc(b) = 1.2 v [3] -26- ? a i bhh bus hold high current a or b port; v i =0.78v;v cc(a) =v cc(b) =1.2v [4] - ? 24 - ? a i bhlo bus hold low overdrive current a or b port; v cc(a) = v cc(b) = 1.2 v [5] -27- ? a i bhho bus hold high overdrive current a or b port; v cc(a) = v cc(b) = 1.2 v [6] - ? 26 - ? a i oz off-state output current a or b port; v o =0 vor v cco ; v cc(a) =v cc(b) =3.6v [7] - ? 0.5 ? 2.5 ? a suspend mode a port; v o =0vorv cco ; v cc(a) = 3.6 v; v cc(b) =0v [7] - ? 0.5 ? 2.5 ? a suspend mode b port; v o =0vorv cco ; v cc(a) =0 v; v cc(b) =3.6v [7] - ? 0.5 ? 2.5 ? a i off power-off leakage current a port; v i or v o = 0 v to 3.6 v; v cc(a) =0v;v cc(b) = 0.8 v to 3.6 v - ? 0.1 ? 1 ? a b port; v i or v o = 0 v to 3.6 v; v cc(b) =0v;v cc(a) = 0.8 v to 3.6 v - ? 0.1 ? 1 ? a c i input capacitance ndir, noe input; v i = 0 v or 3.3 v; v cc(a) =v cc(b) =3.3v -2.0-pf c i/o input/output capacitance a and b port; v o = 3.3 v or 0 v; v cc(a) =v cc(b) =3.3v -4.5-pf
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 9 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state table 7. static characteristics [1] [2] at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min max min max v ih high-level input voltage data input v cci = 0.8 v 0.70v cci -0.70v cci -v v cci = 1.1 v to 1.95 v 0.65v cci -0.65v cci -v v cci = 2.3 v to 2.7 v 1.6 - 1.6 - v v cci = 3.0 v to 3.6 v 2 - 2 - v ndir, noe input v cc(a) = 0.8 v 0.70v cc(a) - 0.70v cc(a) -v v cc(a) = 1.1 v to 1.95 v 0.65v cc(a) - 0.65v cc(a) -v v cc(a) = 2.3 v to 2.7 v 1.6 - 1.6 - v v cc(a) = 3.0 v to 3.6 v 2 - 2 - v v il low-level input voltage data input v cci = 0.8 v - 0.30v cci - 0.30v cci v v cci = 1.1 v to 1.95 v - 0.35v cci - 0.35v cci v v cci = 2.3 v to 2.7 v - 0.7 - 0.7 v v cci = 3.0 v to 3.6 v - 0.8 - 0.8 v ndir, noe input v cc(a) = 0.8 v - 0.30v cc(a) - 0.30v cc(a) v v cc(a) = 1.1 v to 1.95 v - 0.35v cc(a) - 0.35v cc(a) v v cc(a) = 2.3 v to 2.7 v - 0.7 - 0.7 v v cc(a) = 3.0 v to 3.6 v - 0.8 - 0.8 v v oh high-level output voltage v i = v ih or v il i o = ? 100 ? a; v cc(a) =v cc(b) = 0.8 v to 3.6 v v cco ? 0.1 - v cco ? 0.1 - v i o = ? 3ma; v cc(a) =v cc(b) = 1.1 v 0.85 - 0.85 - v i o = ? 6ma; v cc(a) =v cc(b) = 1.4 v 1.05 - 1.05 - v i o = ? 8ma; v cc(a) =v cc(b) =1.65v 1.2 - 1.2 - v i o = ? 9ma; v cc(a) =v cc(b) = 2.3 v 1.75 - 1.75 - v i o = ? 12 ma; v cc(a) =v cc(b) =3.0v 2.3 - 2.3 - v v ol low-level output voltage v i = v ih or v il i o = 100 ? a; v cc(a) =v cc(b) = 0.8 v to 3.6 v -0.1-0.1v i o = 3 ma; v cc(a) =v cc(b) = 1.1 v - 0.25 - 0.25 v i o = 6 ma; v cc(a) =v cc(b) = 1.4 v - 0.35 - 0.35 v i o = 8 ma; v cc(a) =v cc(b) = 1.65 v - 0.45 - 0.45 v i o = 9 ma; v cc(a) =v cc(b) = 2.3 v - 0.55 - 0.55 v i o = 12 ma; v cc(a) =v cc(b) =3.0v - 0.7 - 0.7 v i i input leakage current ndir, noe input; v i = 0 v or 3.6 v; v cc(a) =v cc(b) = 0.8 v to 3.6 v - ? 1- ? 5 ? a
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 10 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state i bhl bus hold low current a or b port [3] v i = 0.49 v; v cc(a) =v cc(b) =1.4v 15 - 15 - ? a v i = 0.58 v; v cc(a) =v cc(b) =1.65v 25 - 25 - ? a v i = 0.70 v; v cc(a) =v cc(b) =2.3v 45 - 45 - ? a v i = 0.80 v; v cc(a) =v cc(b) = 3.0 v 100 - 90 - ? a i bhh bus hold high current a or b port [4] v i = 0.91 v; v cc(a) =v cc(b) =1.4v ? 15 - ? 15 - ? a v i = 1.07 v; v cc(a) =v cc(b) =1.65v ? 25 - ? 25 - ? a v i = 1.60 v; v cc(a) =v cc(b) =2.3v ? 45 - ? 45 - ? a v i = 2.00 v; v cc(a) =v cc(b) =3.0v ? 100 - ? 100 - ? a i bhlo bus hold low overdrive current a or b port [5] v cc(a) = v cc(b) = 1.6 v 125 - 125 - ? a v cc(a) = v cc(b) = 1.95 v 200 - 200 - ? a v cc(a) = v cc(b) = 2.7 v 300 - 300 - ? a v cc(a) = v cc(b) = 3.6 v 500 - 500 - ? a i bhho bus hold high overdrive current a or b port [6] v cc(a) = v cc(b) = 1.6 v ? 125 - ? 125 - ? a v cc(a) = v cc(b) = 1.95 v ? 200 - ? 200 - ? a v cc(a) = v cc(b) = 2.7 v ? 300 - ? 300 - ? a v cc(a) = v cc(b) = 3.6 v ? 500 - ? 500 - ? a i oz off-state output current a or b port; v o =0 vor v cco ; v cc(a) =v cc(b) =3.6v [7] - ? 5- ? 30 ? a suspend mode a port; v o =0vorv cco ; v cc(a) =3.6 v; v cc(b) =0v [7] - ? 5- ? 30 ? a suspend mode b port; v o =0vorv cco ; v cc(a) =0 v; v cc(b) =3.6v [7] - ? 5- ? 30 ? a i off power-off leakage current a port; v i or v o = 0 v to 3.6 v; v cc(a) =0v; v cc(b) = 0.8 v to 3.6 v - ? 5- ? 30 ? a b port; v i or v o = 0 v to 3.6 v; v cc(b) =0v; v cc(a) = 0.8 v to 3.6 v - ? 5- ? 30 ? a table 7. static characteristics ?continued [1] [2] at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min max min max
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 11 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state [1] v cco is the supply voltage associated with the output port. [2] v cci is the supply voltage associated with the data input port. [3] the bus hold circuit can sink at least the minimum low sustaining current at v il max. i bhl should be measured after lowering v i to gnd and then raising it to v il max. [4] the bus hold circuit can source at leas t the minimum high sustaining current at v ih min. i bhh should be measured after raising v i to v cc and then lowering it to v ih min. [5] an external driver must source at least i bhlo to switch this node from low to high. [6] an external driver must sink at least i bhho to switch this node from high to low. [7] for i/o ports, the parameter i oz includes the input leakage current. i cc supply current a port; v i = 0 v or v cci ; i o = 0 a v cc(a) = 0.8 v to 3.6 v; v cc(b) = 0.8 v to 3.6 v -30-125 ? a v cc(a) = 1.1 v to 3.6 v; v cc(b) = 1.1 v to 3.6 v -25-100 ? a v cc(a) = 3.6 v; v cc(b) = 0 v - 25 - 100 ? a v cc(a) = 0 v; v cc(b) = 3.6 v ? 5- ? 20 - ? a b port; v i = 0 v or v cci ; i o = 0 a v cc(a) = 0.8 v to 3.6 v; v cc(b) = 0.8 v to 3.6 v -30-125 ? a v cc(a) = 1.1 v to 3.6 v; v cc(b) = 1.1 v to 3.6 v -25-100 ? a v cc(a) = 3.6 v; v cc(b) = 0 v ? 5- ? 20 - ? a v cc(a) = 0 v; v cc(b) = 3.6 v - 25 - 100 ? a a plus b port (i cc(a) + i cc(b) ); i o =0a; v i =0 vor v cci ; v cc(a) = 0.8 v to 3.6 v; v cc(b) = 0.8 v to 3.6 v -55-185 ? a a plus b port (i cc(a) + i cc(b) ); i o =0a; v i =0 vor v cci ; v cc(a) = 1.1 v to 3.6 v; v cc(b) = 1.1 v to 3.6 v -45-150 ? a table 7. static characteristics ?continued [1] [2] at recommended operating conditions; volt ages are referenced to gnd (ground = 0 v). symbol parameter conditions ? 40 ? c to +85 ?c ? 40 ? c to +125 ?c unit min max min max table 8. typical total supply current (i cc(a) + i cc(b) ) v cc(a) v cc(b) unit 0 v 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v 0 v0 0.10.10.10.10.10.1 ? a 0.8 v 0.1 0.1 0.1 0.1 0.1 0.3 1.6 ? a 1.2 v 0.1 0.1 0.1 0.1 0.1 0.1 0.8 ? a 1.5 v 0.1 0.1 0.1 0.1 0.1 0.1 0.4 ? a 1.8 v 0.1 0.1 0.1 0.1 0.1 0.1 0.2 ? a 2.5 v 0.1 0.3 0.1 0.1 0.1 0.1 0.1 ? a 3.3 v 0.1 1.6 0.8 0.4 0.2 0.1 0.1 ? a
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 12 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state 10. dynamic characteristics [1] c pd is used to determine the dynamic power dissipation (p d in ? w). p d =c pd ? v cc 2 ? f i ? n+ ? (c l ? v cc 2 ? f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l ? v cc 2 ? f o ) = sum of the outputs. [2] f i = 10 mhz; v i =gndtov cc ; t r = t f = 1 ns; c l = 0 pf; r l = ? ? . table 9. typical power dissi pation capacitance at v cc(a) = v cc(b) and t amb = 25 ?c [1] [2] voltages are referenced to gnd (ground = 0 v). symbol parameter conditions v cc(a) = v cc(b) unit 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v c pd power dissipation capacitance a port: (direction nan to nbn); output enabled 0.2 0.2 0.2 0.2 0.3 0.4 pf a port: (direction nan to nbn); output disabled 0.2 0.2 0.2 0.2 0.3 0.4 pf a port: (direction nbn to nan); output enabled 9 9.7 9.8 10.3 11.7 13.7 pf a port: (direction nbn to nan); output disabled 0.6 0.6 0.6 0.7 0.7 0.7 pf b port: (direction nan to nbn); output enabled 9 9.7 9.8 10.3 11.7 13.7 pf b port: (direction nan to nbn); output disabled 0.6 0.6 0.6 0.7 0.7 0.7 pf b port: (direction nbn to nan); output enabled 0.2 0.2 0.2 0.2 0.3 0.4 pf b port: (direction nbn to nan); output disabled 0.2 0.2 0.2 0.2 0.3 0.4 pf
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 13 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . table 10. typical dynamic characteristics at v cc(a) = 0.8 v and t amb = 25 ?c [1] voltages are referenced to gnd (ground = 0 v); for test circuit see figure 8 ; for wave forms see figure 6 and figure 7 symbol parameter conditions v cc(b) unit 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v t pd propagation delay nan to nbn 14.4 7.0 6.2 6.0 5.9 6.0 ns nbn to nan 14.4 12.4 12.1 11.9 11.8 11.8 ns t dis disable time noe to nan 16.2 16.2 16.2 16.2 16.2 16.2 ns noe to nbn 17.6 10.0 9.0 9.1 8.7 9.3 ns t en enable time noe to nan 21.9 21.9 21.9 21.9 21.9 21.9 ns noe to nbn 22.2 11.1 9.8 9.4 9.4 9.6 ns table 11. typical dynamic characteristics at v cc(b) = 0.8 v and t amb = 25 ?c [1] voltages are referenced to gnd (ground = 0 v); for test circuit see figure 8 ; for wave forms see figure 6 and figure 7 symbol parameter conditions v cc(a) unit 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v t pd propagation delay nan to nbn 14.4 12.4 12.1 11.9 11.8 11.8 ns nbn to nan 14.4 7.0 6.2 6.0 5.9 6.0 ns t dis disable time noe to nan 16.2 5.9 4.4 4.2 3.1 3.5 ns noe to nbn 17.6 14.2 13.7 13.6 13.3 13.1 ns t en enable time noe to nan 21.9 6.4 4.4 3.5 2.6 2.3 ns noe to nbn 22.2 17.7 17.2 17.0 16.8 16.7 ns
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 14 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . table 12. dynamic characteristics for temperature range ? 40 ? c to +85 ?c [1] voltages are referenced to gnd (ground = 0 v); for test circuit see figure 8 ; for wave forms see figure 6 and figure 7 . symbol parameter conditions v cc(b) unit 1.2 v ? 0.1 v 1.5 v ? 0.1 v 1.8 v ? 0.15 v 2.5 v ? 0.2 v 3.3 v ? 0.3 v min max min max min max min max min max v cc(a) = 1.1 v to 1.3 v t pd propagation delay nan to nbn 0.5 9.2 0.5 6.9 0.5 6.0 0.5 5.1 0.5 4.9 ns nbn to nan 0.5 9.2 0.5 8.7 0.5 8.5 0.5 8.2 0.5 8.0 ns t dis disable time noe to nan 1.5 11.6 1.5 11.6 1.5 11.6 1.5 11.6 1.5 11.6 ns noe to nbn 1.5 12.5 1.5 9.7 1.5 9.5 1.0 8.1 1.0 8.9 ns t en enable time noe to nan 1.0 14.5 1.0 14.5 1.0 14.5 1.0 14.5 1.0 14.5 ns noe to nbn 1.1 14.9 1.1 11.0 1.1 9.6 1.0 8.1 1.0 7.7 ns v cc(a) = 1.4 v to 1.6 v t pd propagation delay nan to nbn 0.5 8.7 0.5 6.2 0.5 5.2 0.5 4.1 0.5 3.7 ns nbn to nan 0.5 6.9 0.5 6.2 0.5 5.9 0.5 5.6 0.5 5.5 ns t dis disable time noe to nan 1.5 9.1 1.5 9.1 1.5 9.1 1.5 9.1 1.5 9.1 ns noe to nbn 1.5 11.4 1.5 8.7 1.5 7.5 1.0 6.5 1.0 6.3 ns t en enable time noe to nan 1.0 10.1 1.0 10.1 1.0 10.1 1.0 10.1 1.0 10.1 ns noe to nbn 1.0 13.5 1.0 10.1 0.5 8.1 0.5 5.9 0.5 5.2 ns v cc(a) = 1.65 v to 1.95 v t pd propagation delay nan to nbn 0.5 8.5 0.5 5.9 0.5 4.8 0.5 3.7 0.5 3.3 ns nbn to nan 0.5 6.0 0.5 5.2 0.5 4.8 0.5 4.5 0.5 4.4 ns t dis disable time noe to nan 1.5 7.7 1.5 7.7 1.5 7.7 1.5 7.7 1.5 7.7 ns noe to nbn 1.5 11.1 1.5 8.4 1.5 7.1 1.0 5.9 1.0 5.7 ns t en enable time noe to nan 1.0 7.8 1.0 7.8 1.0 7.8 1.0 7.8 1.0 7.8 ns noe to nbn 1.0 13.0 1.0 9.2 0.5 7.4 0.5 5.3 0.5 4.5 ns v cc(a) = 2.3v to 2.7v t pd propagation delay nan to nbn 0.5 8.2 0.5 5.6 0.5 4.6 0.5 3.3 0.5 2.8 ns nbn to nan 0.5 5.1 0.5 4.1 0.5 3.7 0.5 3.4 0.5 3.2 ns t dis disable time noe to nan 1.0 6.1 1.0 6.1 1.0 6.1 1.0 6.1 1.0 6.1 ns noe to nbn 1.0 10.6 1.0 7.9 1.0 6.6 1.0 6.1 1.0 5.2 ns t en enable time noe to nan 0.5 5.3 0.5 5.3 0.5 5.3 0.5 5.3 0.5 5.3 ns noe to nbn 0.5 12.5 0.5 9.4 0.5 7.3 0.5 5.1 0.5 4.5 ns v cc(a) = 3.0v to 3.6v t pd propagation delay nan to nbn 0.5 8.0 0.5 5.5 0.5 4.4 0.5 3.2 0.5 2.7 ns nbn to nan 0.5 4.9 0.5 3.7 0.5 3.3 0.5 2.9 0.5 2.7 ns t dis disable time noe to nan 0.5 5.0 0.5 5.0 0.5 5.0 0.5 5.0 0.5 5.0 ns noe to nbn 1.0 10.3 1.0 7.7 1.0 6.5 1.0 5.2 0.5 5.0 ns t en enable time noe to nan 0.5 4.3 0.5 4.3 0.5 4.2 0.5 4.1 0.5 4.0 ns noe to nbn 0.5 12.4 0.5 9.3 0.5 7.2 0.5 4.9 0.5 4.0 ns
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 15 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state [1] t pd is the same as t plh and t phl ; t dis is the same as t plz and t phz ; t en is the same as t pzl and t pzh . table 13. dynamic characteristics for temperature range ? 40 ? c to +125 ?c [1] voltages are referenced to gnd (ground = 0 v); for test circuit see figure 8 ; for wave forms see figure 6 and figure 7 symbol parameter conditions v cc(b) unit 1.2 v ? 0.1 v 1.5 v ? 0.1 v 1.8 v ? 0.15 v 2.5 v ? 0.2 v 3.3 v ? 0.3 v min max min max min max min max min max v cc(a) = 1.1 v to 1.3 v t pd propagation delay nan to nbn 0.5 10.2 0.5 7.6 0.5 6.6 0.5 5.7 0.5 5.4 ns nbn to nan 0.5 10.2 0.5 9.6 0.5 9.4 0.5 9.1 0.5 8.8 ns t dis disable time noe to nan 1.5 12.8 1.5 12.8 1.5 12.8 1.5 12.8 1.5 12.8 ns noe to nbn 1.5 13.8 1.5 10.7 1.5 10.5 1.0 9.0 1.5 9.8 ns t en enable time noe to nan 1.0 16.0 1.0 16.0 1.0 16.0 1.0 16.0 1.0 16.0 ns noe to nbn 1.1 16.4 1.1 12.1 1.1 10.6 1.0 9.0 1.0 8.5 ns v cc(a) = 1.4 v to 1.6 v t pd propagation delay nan to nbn 0.5 9.6 0.5 6.9 0.5 5.8 0.5 4.6 0.5 4.1 ns nbn to nan 0.5 7.6 0.5 6.9 0.5 6.5 0.5 6.2 0.5 6.1 ns t dis disable time noe to nan 1.5 10.1 1.5 10.1 1.5 10.1 1.5 10.1 1.5 10.1 ns noe to nbn 1.5 12.6 1.5 9.6 1.5 8.3 1.0 7.2 1.0 7.0 ns t en enable time noe to nan 1.0 11.2 1.0 11.2 1.0 11.2 1.0 11.2 1.0 11.2 ns noe to nbn 1.0 14.9 1.0 11.2 0.5 9.0 0.5 6.5 0.5 5.8 ns v cc(a) = 1.65 v to 1.95 v t pd propagation delay nan to nbn 0.5 9.4 0.5 6.5 0.5 5.3 0.5 4.1 0.5 3.7 ns nbn to nan 0.5 6.6 0.5 5.8 0.5 5.3 0.5 5.0 0.5 4.9 ns t dis disable time noe to nan 1.5 8.5 1.5 8.5 1.5 8.5 1.5 8.5 1.5 8.5 ns noe to nbn 1.5 12.3 1.5 9.3 1.5 7.9 1.0 6.5 1.0 6.3 ns t en enable time noe to nan 1.0 8.6 1.0 8.6 1.0 8.6 1.0 8.6 1.0 8.6 ns noe to nbn 1.0 14.3 1.0 10.2 0.5 8.2 0.5 5.9 0.5 5.0 ns v cc(a) = 2.3v to 2.7v t pd propagation delay nan to nbn 0.5 9.1 0.5 6.2 0.5 5.1 0.5 3.7 0.5 3.1 ns nbn to nan 0.5 5.7 0.5 4.6 0.5 4.1 0.5 3.8 0.5 3.6 ns t dis disable time noe to nan 1.0 6.8 1.0 6.8 1.0 6.8 1.0 6.8 1.0 6.8 ns noe to nbn 1.0 11.7 1.0 8.7 1.0 7.3 1.0 6.8 1.0 5.8 ns t en enable time noe to nan 0.5 5.9 0.5 5.9 0.5 5.9 0.5 5.9 0.5 5.9 ns noe to nbn 0.5 13.8 0.5 10.4 0.5 8.1 0.5 5.7 0.5 5.0 ns v cc(a) = 3.0v to 3.6v t pd propagation delay nan to nbn 0.5 8.8 0.5 6.1 0.5 4.9 0.5 3.6 0.5 3.0 ns nbn to nan 0.5 5.4 0.5 4.1 0.5 3.7 0.5 3.2 0.5 3.0 ns t dis disable time noe to nan 0.5 5.5 0.5 5.5 0.5 5.5 0.5 5.5 0.5 5.5 ns noe to nbn 1.0 11.4 1.0 8.5 1.0 7.2 1.0 5.8 0.5 5.5 ns t en enable time noe to nan 0.5 4.8 0.5 4.8 0.5 4.7 0.5 4.6 0.5 4.4 ns noe to nbn 0.5 13.7 0.5 10.3 0.5 8.0 0.5 5.4 0.5 4.4 ns
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 16 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state 11. waveforms [1] v cci is the supply voltage associated with the data input port. [2] v cco is the supply voltage associated with the output port. measurement points are given in table 14 . v ol and v oh are typical output voltage levels that occur with the output load. fig 6. the data input (nan, nbn) to output (nbn, nan) propagation delay times 001aak285 nan, nbn input nbn, nan output t plh t phl gnd v i v oh v m v m v ol measurement points are given in table 14 . v ol and v oh are typical output voltage levels that occur with the output load. fig 7. enable and disable times 001aak286 outputs disabled outputs enabled noe input gnd output low-to-off off-to-low output high-to-off off-to-high outputs enabled v m t plz t pzl t pzh t phz v x v m v oh v y v m v ol v cco v i gnd table 14. measurement points supply voltage input [1] output [2] v cc(a) , v cc(b) v m v m v x v y 0.8 v to 1.6 v 0.5v cci 0.5v cco v ol +0.1v v oh ? 0.1 v 1.65 v to 2.7 v 0.5v cci 0.5v cco v ol +0.15v v oh ? 0.15 v 3.0 v to 3.6 v 0.5v cci 0.5v cco v ol +0.3v v oh ? 0.3 v
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 17 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state [1] v cci is the supply voltage associated with the data input port. [2] dv/dt ? 1.0 v/ns [3] v cco is the supply voltage associated with the output port. test data is given in table 15 . r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance. v ext = external voltage for measuring switching times. fig 8. test circuit for measuring switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aae331 v ext v cc v i v o dut c l r t r l r l g table 15. test data supply voltage input load v ext v cc(a) , v cc(b) v i [1] ? t/ ? v [2] c l r l t plh , t phl t pzh , t phz t pzl , t plz [3] 0.8 v to 1.6 v v cci ?? 1.0ns/v 15pf 2k ? open gnd 2v cco 1.65 v to 2.7 v v cci ? 1.0ns/v 15pf 2k ? open gnd 2v cco 3.0 v to 3.6 v v cci ? 1.0ns/v 15pf 2k ? open gnd 2v cco
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 18 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state 12. typical propagation delay characteristics a. propagation delay (nan to nbn); v cc(a) = 0.8 v b. propagation delay (nan to nbn); v cc(b) = 0.8 v (1) v cc(b) = 0.8 v. (2) v cc(b) = 1.2 v. (3) v cc(b) = 1.5 v. (4) v cc(b) = 1.8 v. (5) v cc(b) = 2.5 v. (6) v cc(b) = 3.3 v. (1) v cc(a) = 0.8 v. (2) v cc(a) = 1.2 v. (3) v cc(a) = 1.5 v. (4) v cc(a) = 1.8 v. (5) v cc(a) = 2.5 v. (6) v cc(a) = 3.3 v. fig 9. typical propagation delay versus load capacitance; t amb = 25 ?c 001aai476 c l (pf) 060 40 20 12 16 8 20 24 t pd (ns) 4 (1) (2) (3) (4) (5) (6) c l (pf) 060 40 20 001aai477 13 17 21 t pd (ns) 9 (1) (2) (3) (4) (5) (6)
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 19 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state a. low to high propagation delay (nan to nbn); v cc(a) = 1.2 v b. high to low propagation delay (nan to nbn); v cc(a) = 1.2 v c. low to high propagation delay (nan to nbn); v cc(a) = 1.5 v d. high to low propagation delay (nan to nbn); v cc(a) = 1.5 v (1) v cc(b) = 1.2 v. (2) v cc(b) = 1.5 v. (3) v cc(b) = 1.8 v. (4) v cc(b) = 2.5 v. (5) v cc(b) = 3.3 v. fig 10. typical propagation delay versus load capacitance; t amb = 25 ?c c l (pf) 060 40 20 001aai478 3 5 7 t plh (ns) 1 (1) (2) (3) (4) (5) c l (pf) 060 40 20 001aai491 3 5 7 t phl (ns) 1 (4) (5) (1) (2) (3) c l (pf) 060 40 20 001aai479 3 5 7 t plh (ns) 1 (1) (2) (3) (4) (5) c l (pf) 060 40 20 001aai480 3 5 7 t phl (ns) 1 (1) (2) (3) (5) (4)
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 20 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state a. low to high propagation delay (nan to nbn); v cc(a) = 1.8 v b. high to low propagation delay (nan to nbn); v cc(a) = 1.8 v c. low to high propagation delay (nan to nbn); v cc(a) = 2.5 v d. high to low propagation delay (nan to nbn); v cc(a) = 2.5 v (1) v cc(b) = 1.2 v. (2) v cc(b) = 1.5 v. (3) v cc(b) = 1.8 v. (4) v cc(b) = 2.5 v. (5) v cc(b) = 3.3 v. fig 11. typical propagation delay versus load capacitance; t amb = 25 ?c c l (pf) 060 40 20 001aai481 3 5 7 t plh (ns) 1 (1) (2) (3) (5) (4) c l (pf) 060 40 20 001aai482 3 5 7 t phl (ns) 1 (1) (2) (3) (5) (4) c l (pf) 060 40 20 001aai483 3 5 7 t plh (ns) 1 (1) (2) (3) (5) (4) c l (pf) 060 40 20 001aai486 3 5 7 t phl (ns) 1 (1) (2) (3) (5) (4)
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 21 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state a. low to high propagation delay (nan to nbn); v cc(a) = 3.3 v b. high to low propagation delay (nan to nbn); v cc(a) = 3.3 v (1) v cc(b) = 1.2 v. (2) v cc(b) = 1.5 v. (3) v cc(b) = 1.8 v. (4) v cc(b) = 2.5 v. (5) v cc(b) = 3.3 v. fig 12. typical propagation delay versus load capacitance; t amb = 25 ?c c l (pf) 060 40 20 001aai485 3 5 7 t plh (ns) 1 (1) (2) (3) (5) (4) c l (pf) 060 40 20 001aai484 3 5 7 t phl (ns) 1 (1) (2) (3) (5) (4)
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 22 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state 13. package outline fig 13. package outline sot362-1 (tssop48) unit a 1 a 2 a 3 b p cd (1) e (2) eh e ll p qz ywv references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.2 0.1 8 0 o o 0.1 dimensions (mm are the original dimensions). notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. sot362-1 99-12-27 03-02-19 w m tssop48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm sot362-1 a max. 1.2 0 2.5 5 mm scale mo-153
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 23 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state fig 14. package outline sot480-1 (tssop48) unit a 1 a 2 a 3 b p d (1) e (2) h e l p celq z (1) ywv references outline version european projection issue date 99-12-27 03-02-18 iec jedec jeita mm 0.15 0.05 0.95 0.85 0.23 0.13 0.20 0.09 9.8 9.6 4.5 4.3 6.6 6.2 0.4 0.4 0.3 8 0 o o 0.07 0.08 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.7 0.5 sot480-1 mo-153 0.25 0.4 0.1 w m b p e 12 4 48 25 z pin 1 index tssop48: plastic thin shrink small outline package; 48 leads; body width 4.4 mm; lead pitch 0.4 mm sot480-1 a max. 1.1
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 24 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state fig 15. package outline sot702-1 (vfbga56) 0.65 a 1 ba 2 unit d y e references outline version european projection issue date 02-08-08 03-07-01 iec jedec jeita mm 1 0.3 0.2 0.7 0.6 4.6 4.4 y 1 7.1 6.9 0.45 0.35 0.08 0.1 e 1 3.25 e 2 5.85 dimensions (mm are the original dimensions) sot702-1 mo-225 e 0.15 v 0.08 w 0 2.5 5 mm scale sot702-1 vfbga56: plastic very thin fine-pitch ball grid array package; 56 balls; body 4.5 x 7 x 0.65 mm a max. a a 2 a 1 detail x y y 1 c e e b x d e c a b c d e f h g j k 246 135 ball a1 index area b a e 2 e 1 1/2 e 1/2 e ac c b v m w m ball a1 index area
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 25 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state fig 16. package outline sot1134-2 (hxqfn60) references outline version european projection issue date iec jedec jeita sot1134-2 - - - - - - - - - sot1134-2_po 11-08-15 unit mm max nom min 0.50 0.08 0.05 0.02 0.28 0.23 0.18 1.95 1.85 1.75 6.1 6.0 5.9 3.95 3.85 3.75 1.0 2.5 4.5 0.195 0.145 0.095 0.1 a dimensions hxqfn60: plastic compatible thermal enhanced extremely thin quad flat package; no leads; 60 terminals; body 4 x 6 x 0.5 mm sot1134-2 a 1 a 2 0.42 0.40 0.38 bd 4.1 4.0 3.9 d h ee h 0.08 0.1 yy 1 e 0.5 e 1 e 2 e 3 3.0 e 4 et 0.49 er 0.5 k 0.25 0.20 0.15 l 0.28 0.23 0.18 l 1 v 0.05 w 0 5 mm terminal 1 index area b a d e c y c y 1 x detail x a a 2 a 1 terminal 1 index area e 2 e 1 et er et er e 4 e 3 e e 1/2 e 1/2 e ac b v c w b ac b v c w d h k l e h l 1 b1 a1 b7 d5 d8 d6 d7 d1 d4 d2 d3 b20 b18 a27 a26 a17 b11 b17 a11 b8 b10 a16 a32 a10 er et er et
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 26 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state 14. abbreviations 15. revision history table 16. abbreviations acronym description cdm charged device model dut device under test esd electrostatic discharge hbm human body model mm machine model table 17. revision history document id release date data sheet status change notice supersedes 74avch16t245 v.5 20120301 product data sheet - 74avch16t245 v.4 modifications: ? for type number 74avch16t245bx the sot code has changed to sot1134-2. 74avch16t245 v.4 20111207 product data sheet - 74avch16t245 v.3 modifications: ? legal pages updated. 74avch16t245 v.3 20110616 product data sheet - 74avch16t245 v.2 74avch16t245 v.2 20100329 product data sheet - 74avch16t245 v.1 74avch16t245 v.1 20091014 product data sheet - -
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 27 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state 16. legal information 16.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 16.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 16.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
74avch16t245 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2012. all rights reserved. product data sheet rev. 5 ? 1 march 2012 28 of 29 nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 16.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. 17. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors 74avch16t245 16-bit dual supply translating transceiver; 3-state ? nxp b.v. 2012. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 1 march 2012 document identifier: 74avch16t245 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 18. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 6 functional description . . . . . . . . . . . . . . . . . . . 6 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7 8 recommended operating conditions. . . . . . . . 7 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 8 10 dynamic characteristics . . . . . . . . . . . . . . . . . 12 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 12 typical propagation delay characteristics . . 18 13 package outline . . . . . . . . . . . . . . . . . . . . . . . . 22 14 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 26 15 revision history . . . . . . . . . . . . . . . . . . . . . . . . 26 16 legal information. . . . . . . . . . . . . . . . . . . . . . . 27 16.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 27 16.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 16.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 16.4 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 28 17 contact information. . . . . . . . . . . . . . . . . . . . . 28 18 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

▲Up To Search▲

Price & Availability of 74AVCH16T245DGV

	To Download 74AVCH16T245DGV Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .